ONESHOTX=0, ARMX=0, EDGCNTX_EN=0, EDGX1=00, INP_SELX=0, EDGX0=00
Capture Control X Register
| ARMX | Arm X 0 (0): Input capture operation is disabled. 1 (1): Input capture operation as specified by CAPTCTRLX[EDGXx] is enabled. |
| ONESHOTX | One Shot Mode Aux 0 (0): Free running mode is selected. If both capture circuits are enabled, then capture circuit 0 is armed first after the ARMX bit is set. Once a capture occurs, capture circuit 0 is disarmed and capture circuit 1 is armed. After capture circuit 1 performs a capture, it is disarmed and capture circuit 0 is re-armed. The process continues indefinitely. If only one of the capture circuits is enabled, then captures continue indefinitely on the enabled capture circuit. 1 (1): One shot mode is selected. If both capture circuits are enabled, then capture circuit 0 is armed first after the ARMX bit is set. Once a capture occurs, capture circuit 0 is disarmed and capture circuit 1 is armed. After capture circuit 1 performs a capture, it is disarmed and the ARMX bit is cleared. No further captures will be performed until the ARMX bit is set again. If only one of the capture circuits is enabled, then a single capture will occur on the enabled capture circuit and the ARMX bit is then cleared. |
| EDGX0 | Edge X 0 0 (00): Disabled 1 (01): Capture falling edges 2 (10): Capture rising edges 3 (11): Capture any edge |
| EDGX1 | Edge X 1 0 (00): Disabled 1 (01): Capture falling edges 2 (10): Capture rising edges 3 (11): Capture any edge |
| INP_SELX | Input Select X 0 (0): Raw PWM_X input signal selected as source. 1 (1): Output of edge counter/compare selected as source. When this bitfield is set to 1, the internal edge counter is enabled and the rising and/or falling edges specified by the CAPTCTRLX[EDGX0] and CAPTCTRLX[EDGX1] fields are ignored. The software must still place a value other than 00 in either or both of the CAPTCTLRX[EDGX0] and/or CAPTCTRLX[EDGX1] fields in order to enable one or both of the capture registers. |
| EDGCNTX_EN | Edge Counter X Enable 0 (0): Edge counter disabled and held in reset 1 (1): Edge counter enabled |
| CFXWM | Capture X FIFOs Water Mark |
| CX0CNT | Capture X0 FIFO Word Count |
| CX1CNT | Capture X1 FIFO Word Count |